The flight computer and data-handling unit has primary control over the spacecraft throughout its’ operation. It controls the payload and the communications subsystem while in turn acting on commands from the ground received via the communication subsystem. In addition there is a watchdog for the system to reboot it in the event of a malfunction.
The selected chip for the CubeSat is the TM4C12x series of processors. They series have a builtin in sleep mode, allowing power to be saved where possible. This series was also selected because there are a large range of development board available as well as supporting I2C, SPI, UART and PWM.
The chip has builtin Flash, RAM and EEPROM memory. This allows vital data to be stored in non-volatile memory, protecting against it being lost if there is a system reboot.
Due to the low cost nature of CubeSat projects the electronics are not radiation hardened and are therefore susceptible to Single Event Effects. To add a level of protection against this a radiation hardened watchdog was chosen to listen to the main computer on the spacecraft. The watchdog expects to “hear” the computer operating once in a ten minute period. If this is not the case, the watchdog forces a reboot of the computer.
Several sensors monitor the “health” of the spacecraft and are downloaded to the ground for analysis. The telemetry data recorded includes:
The UoS3 project is undertaken with the support of the Education Office of the European Space Agency, under the educational Fly your Satellite! Programme; an ESA educational programme complementing academic education.